Talk:VHDL for FPGA Design/Multiplexer

Sequencial vs. paralell
A multiplexer is by nature unclocked and paralell. It triggers on all signals, so it shouldn't have D-latches.

I think this code can be made better using with/select-statement. Like:

(I don't have access to a simulator to verify my code here, so I don't update the main page right now...)

Thoughts?

--Pengi (talk) 14:00, 19 November 2009 (UTC)

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