Talk:Digital Circuits/Flip-Flops

I disagree with the following text

"An SR (Set/Reset) flip-flop is perhaps the simplest flip-flop, and is very similar to the SR latch, other than for the fact that it only transitions on clock edges."

A simple SR latch is level sensitive. A gated(or clocked if the Enable input is connected to a clock signal) SR latch is also level sensitive.It only adds one more level of control of the output. According to many textbooks an SR Flip-Flop is sensitive to clock edges only when it is connected with well-known master-slave configuration. So, the above text is confusing. It implies, that an SR Flip-Flop is similar to the SR Latch with the only difference being the type of sensitivity.It must be clarified. --Socware (talk) 23:41, 19 April 2010 (UTC) can somebody fill up the text with more clear uses of flip flops.i mean a detail on their uses would be nice

to mind boggling
does not explain filp flops good.