Fundamental Digital Electronics/Combinational Gates

Following the Invert and the Morgan Laws logical gates can be combined to form new gates

Buffer

 * Logic-gate-inv-us.png [[Image:Logic-gate-inv-us.png|100px|Cổng NOT (NOT Gate)]] ->Buffer_ANSI_Labelled.svg
 * Y = is NOT NOT A or Y = A
 * A B 0 0 1 1

NOT Gate

 * Buffer_ANSI_Labelled.svg Logic-gate-inv-us.png -> Logic-gate-inv-us.png
 * Y = is NOT A
 * A B 0 1 1 0

NAND Gate

 * Logic-gate-and-us.png Logic-gate-inv-us.png -> NAND_ANSI.svg
 * Y = is NOT A
 * A B 0 1 1 0

NOR Gate

 * Logic-gate-or-us.png [[Image:Logic-gate-inv-us.png|100px|Cổng NOT (NOT Gate)]] -> Logic-gate-nor-us.png
 * Y = is NOT A
 * A B 0 1 1 0

XNOR Gate

 * XOR_ANSI_Labelled.svg [[Image:Logic-gate-inv-us.png|100px|Cổng NOT (NOT Gate)]] -> [[Image:Logic-gate-inv-us.png|100px|Cổng NOT (NOT Gate)]]
 * Y = is NOT A
 * A B 0 1 1 0


 * XNOR_using_NOR.svg
 * XNOR_Aufbau.png