Electronics/Combination gates

Complement of Basic Logic gates

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!Basic Gates !! Combination Gates!! Symbol !! Mathematical Expression
 * BUFFER|| Logic-gate-inv-us.png [[Image:Logic-gate-inv-us.png|100px|Cổng NOT (NOT Gate)]] || Buffer_ANSI_Labelled.svg || Y = is NOT NOT A Y = A
 * BUFFER|| Logic-gate-inv-us.png [[Image:Logic-gate-inv-us.png|100px|Cổng NOT (NOT Gate)]] || Buffer_ANSI_Labelled.svg || Y = is NOT NOT A Y = A


 * NOT || Buffer_ANSI_Labelled.svg [[Image:Logic-gate-inv-us.png|100px|Cổng NOT (NOT Gate)]] || [[Image:Logic-gate-inv-us.png|100px|Cổng NOT (NOT Gate)]] || Y = is NOT A


 * NAND || Logic-gate-and-us.png [[Image:Logic-gate-inv-us.png|100px|Cổng NOT (NOT Gate)]] || NAND_ANSI_Labelled.svg || Y = NOT A AND B


 * NOR || Logic-gate-or-us.png [[Image:Logic-gate-inv-us.png|100px|Cổng NOT (NOT Gate)]] || Logic-gate-nor-us.png || Y = NOT A OR B


 * XNOR || XOR_ANSI_Labelled.svg Logic-gate-inv-us.png || Logic-gate-nor-us.png || Y = NOT A NOR B
 * }
 * }

Truth table of the combination gates


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! A !! B !! Q = A !! Q = NOT A !! Q = A NAND B !! Q = A NOR B !! Q = A XOR B
 * 0 || 0 || 0 ||1 || 1 || 0 || 0
 * 0 || 1 || 0 || 1 || 1 || 0 || 1
 * 1 || 0 || 1 || 0 || 1 || 0 || 1
 * 1 || 1 || 1 || 0 || 0 || 1 || 0
 * }
 * 1 || 0 || 1 || 0 || 1 || 0 || 1
 * 1 || 1 || 1 || 0 || 0 || 1 || 0
 * }
 * }
 * }

XOR

 * (A AND B) OR (A OR B) = A XOR B
 * (A.B) + (A+B) = A+B