A-level Computing 2009/CIE/Theory Fundamentals/Processor fundamentals

4.1 Von Neumann Machine

 * Von Neumann realized data and programs are indistinguishable & can therefore use the same memory
 * Von Neumann architecture uses a single processor
 * It follows a linear sequence of fetch–decode–execute operations for the set of instructions i.e. the program
 * In order to do this, the processor has to use registers

4.2 Registers

 * It is an extremely fast piece of on-chip memory, usually 32 or 64 bits in size for temporary storage
 * Registers are outside the immediate access store and consequently allow faster access to the data they store

Special Registers

 * Program counter (PC): keeps track of where to find next instruction so that a copy of the instruction can be placed in the current instruction register
 * Memory data register (MDR): acts like a buffer & holds anything copied from memory ready for processor to use
 * Memory address register (MAR): used to hold memory address that contains either the next piece of data or an instruction that is to be used
 * Index register (IR): a microprocessor register used for modifying operand addresses during run of a program
 * Used if address indirect; a constant from the instruction added to contents of IR to form address to operand/data
 * Current instruction register (CIR): holds the instruction that is to be executed.
 * Status register (SR): holds results of comparisons to decide later for action, intermediate results of arithmetic performed and any errors occurred during arithmetic
 * General-purpose register: One or more registers in the CPU that temporarily store data
 * Accumulator: single general-purpose register inside ALU
 * It is a single general-purpose register where all values held when processed by arithmetic & logical operations

4.3 The Processor

 * Arithmetic and logic unit (ALU): part of processor that performs arithmetic calculations & logical decisions
 * Control unit: part of processor that fetches instructions from memory, decodes them & synchronizes operations before sending signals to other parts of the computer
 * System clock: timing device connected to the processor that synchronizes when fetch-execute cycle runs

4.4 System Buses

 * Bus: set of parallel wires that connect various components & provides communication between them
 * Data bus: bi-directional, used to carry data and instructions between system components
 * The memory data register (MDR) is at one end of the data bus
 * Address bus: unidirectional, carries address of main memory location or input/output device about to be used from processor to memory address register (MAR)
 * Control bus: bi-directional, used to send control signals from control unit to ensure access/use of data & address buses by components of system does not lead to conflict

THE FETCH−DECODE−EXECUTE CYCLE
1) Fetch:

First step the CPU carries out is to fetch some data and instructions from the main memory which is stored temporary memory areas called registers

The CPU makes use of a vital hardware path called address bus. The CPU places address of the next item to be fetched on the address bus

Data from this address moves from the main memory into the CPU by traveling in the data bus

2) Decode:

The CPU needs to make sense of the instruction

The CPU is designed to understand a specific set of commands called the "instruction set".

The CPU decodes the instruction

3) Execute:

Data processing takes place

The instruction is executed

The CPU sets itself up to begin another cycle once more