68000 Assembly/Addressing Modes

Addressing Modes
n is a number between 0 and 7 denoting which register to use.

Immediate addressing with data registers
Assembler syntax Directly operate on the contents of a data register. Example: "" Copies the contents of D1 to D0. When the instruction is executed, both registers will contain the same information. When moving a byte or a word, the upper part of the register will remain unchanged. ""
 * Dn

Immediate addressing with address registers
Assembler syntax: Directly operate on the contents of an address register.Example: "" Copies whole A1 to D0. After the instruction, both registers contain the same information. When transferring with ADDRESS registers you must use word or longword. When a word is transferred to an address register, bit 15 (the sign bit) will be copied through the whole upper word (bit 16-31). If it wasn't so, a negative number would become positive. ""
 * An

Indirect addressing
Assembler syntax: Operate on the memory location pointed to by An. For example: lea $1234,A1 move.w D0,(A1) will move the first 16 bits of D0 into the word starting at $1234. Another example: "" Copies the long word starting at address location stored in A0 (you say A0 points to the long word). If you refer to a word or a long word, the address in the address register must be an EVEN number. Take care with this!!! ""
 * (An)

Indirect addressing with postincrement
Assembler syntax: Same as indirect addressing, but An will be increased by the size of the operation after the instruction is executed. The only exception is byte operations on A7 - this register must point to an even address, so it will always increment by at least 2. Example: "" Copies to D0 the longword to which A1 points, and increases A1 with 4 (because of Long). ""
 * (An)+

Indirect addressing with predecrement
Assembler syntax: Same as indirect addressing, but An will be decremented by the size of the operation BEFORE the instruction is executed. The only exception is byte operations on A7 - this register must point to an even address, so it will always decrement by at least 2. Note that there is no postdecrement or preincrement addressing mode. Example: "" First decreases A0 with 4(size of operand), then copies the long word starting at address stored in A0 to D2. ""
 * -(An)

Indirect addressing with displacement
Assembler syntax: Operate on the location pointed to by x + An, where x is a 16-bit immediate value. All listed syntaxes are equivalent, but some assemblers won't accept them all.
 * x(An)
 * (x)(An)
 * (x,An)

Indirect addressing with index
Assembler syntax: Same as above, but another register will also be added. Scale can be 1, 2, 4, or 8. Scale is not supported on all devices. Not all assemblers will take all listed syntaxes.
 * x(An,Dn.W)
 * x(An,Dn.W*scale)
 * x(An,Dn.L)
 * x(An,Dn.L*scale)
 * x(An,An.W)
 * x(An,An.W*scale)
 * x(An,An.L)
 * x(An,An.L*scale)
 * (x)(An,Dn.W)
 * (x)(An,Dn.W*scale)
 * (x)(An,Dn.L)
 * (x)(An,Dn.L*scale)
 * (x)(An,An.W)
 * (x)(An,An.W*scale)
 * (x)(An,An.L)
 * (x)(An,An.L*scale)
 * (x,An,Dn.W)
 * (x,An,Dn.W*scale)
 * (x,An,Dn.L)
 * (x,An,Dn.L*scale)
 * (x,An,An.W)
 * (x,An,An.W*scale)
 * (x,An,An.L)
 * (x,An,An.L*scale)

Absolute near addressing
Assembler syntax: Operate on the location pointed to by letters like xyz, sign-extended by the assembler. You can write this either with or without the parentheses, and most assemblers can take either one. Which you choose is largely a matter of personal preference, but most people find (xyz).W easier to read.
 * (xyz).W
 * xyz.W

Absolute far addressing
Assembler syntax: Operate on the location pointed to by letters like xyz, sign-extended by the assembler. Some instructions only accept one or the other of near or far absolute addresses, thus the separation. Like absolute near, you can include the parentheses at your discretion.
 * (xyz).L
 * xyz.L

Program counter indirect with displacement
Assembler syntax: Operate on the memory value at x + PC, where x is a 16-bit immediate value. Note that PC is the address of the extension word that x is stored in (right after the instruction's word). All syntaxes are equivalent, but some assemblers won't take them all.
 * x(PC)
 * (x)(PC)
 * (x,PC)

Program counter indirect with index
Assembler syntax: Like PC with displacement, but another register is added as well. Scale can be 1, 2, 4, or 8. Scale is not supported on all devices. Some assemblers won't take certain syntaxes.
 * x(PC,Dn.W)
 * x(PC,Dn.W*scale)
 * x(PC,Dn.L)
 * x(PC,Dn.L*scale)
 * x(PC,An.W)
 * x(PC,An.W*scale)
 * x(PC,An.L)
 * x(PC,An.L*scale)
 * (x)(PC,Dn.W)
 * (x)(PC,Dn.W*scale)
 * (x)(PC,Dn.L)
 * (x)(PC,Dn.L*scale)
 * (x)(PC,An.W)
 * (x)(PC,An.W*scale)
 * (x)(PC,An.L)
 * (x)(PC,An.L*scale)
 * (x,PC,Dn.W)
 * (x,PC,Dn.W*scale)
 * (x,PC,Dn.L)
 * (x,PC,Dn.L*scale)
 * (x,PC,An.W)
 * (x,PC,An.W*scale)
 * (x,PC,An.L)
 * (x,PC,An.L*scale)

Memory indirect addressing
Assembler syntax: These addressing modes perform two memory accesses - first a read in to a table of addresses, second the actual read or write. Not supported by all devices. In memory indirect preindexed mode, the CPU will first read bd+An+Rn*scale, then add od, and use the resulting value as the address for the final read or write. In memory indirect postindexed mode, the CPU will first read bd+An, then add Rn*scale+od, and use the resulting value as the address for the final read or write.
 * ([bd,An],od)
 * ([bd,An],An.W*scale,od)
 * ([bd,An],An.L*scale,od)
 * ([bd,An],Dn.W*scale,od)
 * ([bd,An],Dn.L*scale,od)
 * ([bd,An,An.W*scale],od)
 * ([bd,An,An.L*scale],od)
 * ([bd,An,Dn.W*scale],od)
 * ([bd,An,Dn.L*scale],od)
 * ([bd,PC],od)
 * ([bd,PC],An.W*scale,od)
 * ([bd,PC],An.L*scale,od)
 * ([bd,PC],Dn.W*scale,od)
 * ([bd,PC],Dn.L*scale,od)
 * ([bd,PC,An.W*scale],od)
 * ([bd,PC,An.L*scale],od)
 * ([bd,PC,Dn.W*scale],od)
 * ([bd,PC,Dn.L*scale],od)

Immediate addressing
Assembler syntax: Operate on xyz.
 * #xyz

Status Register addressing
Assembler syntax: SR is the entire status register, including the system byte. CCR is just the flags. Other than that, I don't know how this works. SR is only available in supervisor mode.
 * SR
 * CCR

The only instructions that are allowed to use this addressing mode are: MOVE, ANDI (AND immediate), EORI (exclusive OR immediate) and ORI (OR immediate) known as: MOVE to/from CCR, MOVE to/from SR, ANDI to CCR, ORI to CCR, EORI to CCR, ANDI to SR, ORI to SR, EORI to SR. ""