360 Assembly/360 Instructions

When the System/360 ("360") was introduced in 1964, there were five instruction formats: RR, RS, RX, SI, and SS. An instruction's format was determined by the first two bits of its operation code ("opcode"), which is the instruction's first eight bits. The first 2-bits are as follows:
 * 00 (opcodes 00 to 3F/0 to 63 (decimal); RR instruction, generally two registers)
 * 01 (opcodes 40 to 7F/64 to 127 (decimal); RX instruction, one register and one address calculated using a base register, an index register, and a displacement of 0 to 4095 bytes
 * 10 (opcodes 80 to BF/128 to 191 (decimal); RS or SI instruction)
 * (An RS instruction was generally one register and a storage location address.)
 * (An SI instruction was generally one register, one storage location, and an immediate value.)
 * 11 (opcodes C0 to FF/192 to 255 (decimal); SS instruction, two storage addresses)

In order to encourage the expansion of IBM mainframes into more and more uses, the capabilities of their processors were enhanced with new instruction formats, allowing for additional functionality at the machine code level. Currently, there are many instruction formats now available on all mainframe models: the 360, System/370 ("370" or "S/370"), ESA/390 ("390"), and z/System ("Z"). Each instruction format, along with a breakdown and explanation of the format, is provided in the table below.

Notes:
 * Under "Availability," unless "all" is specified, it is available on certain models, namely: "370" indicates an instruction is available on 370 and later models (370,390, and z/System); "ESA/390" indicates that an instruction is available on 390 and z/System; and "Z" indicates an instruction is available on z/System only. However, despite the listed availability of a particular instruction format, the availability of a specific instruction of that format may be further restricted.
 * A "base-displacement" address is described as "B1, D1" where a base-displacement address is used or as either "B2, D2" or "B2, D2, X2" where an index register is also used (the address is indexed). If a base-displacement address is not indexed, the X2 field on the second operand is not used. The B or X values refer to a 4-bit register value from 0 to 15, and the D value is an unsigned, 12-bit displacement address.
 * Instructions take a multiple of two bytes, and are two, four or six bytes in length.

All instructions must be aligned to an even address. Attempts to create an instruction at an odd address will be flagged as an error by the assembler; an attempt to branch to an odd address will result in an address exception.

There are four instruction set architectures:
 * 360 instructions are those which were part of the original IBM 360 mainframe instruction set architecture and are shown on the table below in this color: [      ]. Except for instructions marked "360 only," these instructions work on all models.
 * 370 instructions were added with the creation of the IBM 370 and are shown on the table below in this color: [      ]. They are only available on 370- and higher-series machines and will not work (and will "throw an exception") if they are attempted to be executed on a 360. Instructions marked "370 only" will also throw an exception on the 390 or Z. Instructions marked "370 only" and "390 only" will throw an exception on the z/System.
 * ESA/390 instructions were created for the 390 and are shown on the table below in this color: [      ]. They are only available on ESA/390 and z/System mainframes and will throw an exception if they are attempted to be executed on a 360 or S/370. Instructions marked "390 Only" will throw an exception on the z/System.
 * z/System instructions were created after the 370 and 390 and are shown on the table below in this color: [      ]. They will throw an exception on 360, 370, or 390 hardware and work only on z/System mainframes.

In general, there are seven classes of instructions:
 * Branch Instructions, which jump from one part of a program to another
 * Data Transfer Instructions, which move data from one part of memory (including registers)
 * Control Flow Instructions, which make changes in the scope of execution of a program
 * Arithmetic Instructions, which do computations
 * Logic Instructions, which make comparisons
 * Shift and Rotate Instructions, which move bits right or left,
 * Privileged Instructions, used by the operating system or other programs having special permission, primarily to do input/output or to control the operations of the machine, and
 * Other Instructions, instructions not otherwise classified

Additionally, the S/370 and S/390 had an optional Vector Facility, whose instruction opcodes can be seen in the table below, beginning with A4 hexadecimal. Support for the Vector Facility was discontinued with the z/Architecture; however, the z13 reintroduced vector instructions, albeit a new set of vector instructions with incompatible opcodes from the old 370/390 Vector Facility. (The new z13 vector instructions are not currently in the table.)

The table below lists specific instructions available on the four instruction set architectures. The table can be sorted by column. To do so, click on the symbol at the top of a column. The numeric value of opcodes listed is shown in hexadecimal only.

[1]Technically, the DIAGNOSE instruction does not have a mnemonic, and is usually hard-coded in source.